/* 
 -- ============================================================================
 -- FILE NAME	: chip_top.v
 -- DESCRIPTION
 -- ----------------------------------------------------------------------------
 -- Revision  Date		  Coding_by
 -- 1.0.0	  2011/06/27   XIAOHEI		 
 -- ============================================================================
*/

`include "nettype.h"
`include "stddef.h"
`include "global_config.h"
`include "gpio.h"

module chip_top (
	input wire				   clk_ref,	
	input wire				   reset_sw	

`ifdef IMPLEMENT_UART
	, input wire			   uart_rx	
	, output wire			   uart_tx	
`endif
`ifdef IMPLEMENT_GPIO
`ifdef GPIO_IN_CH
	, input wire [`GPIO_IN_CH-1:0]	 gpio_in
`endif
`ifdef GPIO_OUT_CH
	, output wire [`GPIO_OUT_CH-1:0] gpio_out
`endif
`ifdef GPIO_IO_CH
	, inout wire [`GPIO_IO_CH-1:0]	 gpio_io
`endif
`endif
);

	wire					   clk;	
	wire					   clk_;
	wire					   chip_reset;
   
	clk_gen clk_gen (
		.clk_ref	  (clk_ref),
		.reset_sw	  (reset_sw),
		.clk		  (clk),	
		.clk_		  (clk_),	
		.chip_reset	  (chip_reset)
	);

	chip chip (
		.clk	  (clk),		
		.clk_	  (clk_),
		.reset	  (chip_reset)
`ifdef IMPLEMENT_UART
		, .uart_rx	(uart_rx)
		, .uart_tx	(uart_tx)
`endif
`ifdef IMPLEMENT_GPIO
`ifdef GPIO_IN_CH
		, .gpio_in (gpio_in)				
`endif
`ifdef GPIO_OUT_CH
		, .gpio_out (gpio_out)
`endif
`ifdef GPIO_IO_CH
		, .gpio_io	(gpio_io)
`endif
`endif
	);

endmodule
